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Hardware Reference Manual for i.MX53 Quick Start
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5.5.
DDR3   SDRAM   Memory  
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The ? Quick ? Start ? board ? has ? four ? 128MX16 ? DDR3 ? SDRAM ? chips ? for ? a ? total ? of ? 1GB ? RAM ? memory. ? The ? chips ?
are ? organized ? in ? two ? different ? arrays, ? differentiated ? by ? the ? chip ? selects, ? storing ? either ? the ? upper ? 16 ‐ bits ?
or ? the ? lower ? 16 ‐ bits ? of ? a ? 32 ‐ bit ? word. ? This ? organization ? is ? shown ? in ? Table ? 9 ? below. ?
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Lower ? 16 ‐ bits ? [15:0] ?
Upper ? 16 ‐ bits ? [31:16] ?
Chip ? Select ? ‘0’ ?
U3 ?
U5 ?
Chip ? Select ? ‘1’ ?
U4 ?
U6 ?
Table ? 9. ?
DDR3 ? SDRAM ? Chip ? Organization ?
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In ? this ? organization, ? there ? are ? 21 ? traces ? that ? connect ? to ? all ? four ? DDR3 ? chips ? and ? the ? i.MX53 ? Processor ? (14 ?
Address, ? 3 ? Bank ? Address, ? 3 ? Control, ? and ? Reset). ? These ? are ? the ? most ? critical ? traces ? since ? they ? will ? see ? the ?
most ? loading. ? The ? remaining ? traces ? are ? connected ? to ? two ? DDR3 ? chips ? and ? the ? Processor, ? and ? will ? only ?
see ? one ? active ? DDR3 ? chip ? at ? a ? time. ? Note ? that ? the ? two ? clock ? traces ? are ? tied ? with ? the ? data ? traces ?
(SDCLK_0 ? for ? the ? lower ? 16 ‐ bits, ? SDCLK_1 ? for ? the ? upper ? 16 ‐ bits). ? This ? limits ? the ? clock ? traces ? to ? only ? one ?
active ? DDR3 ? chip ? at ? a ? time ? as ? well. ?
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In ? the ? physical ? layout, ? the ? DDR3 ? chips ? are ? placed ? to ? minimize ? routing ? of ? the ? address ? traces. ? The ? two ? chip ?
select ? ‘0’ ? chips ? are ? placed ? on ? top, ? and ? the ? two ? chip ? select ? ‘1’ ? chips ? are ? placed ? on ? the ? bottom ? side, ?
directly ? below ? the ? chips ? with ? the ? same ? data ? traces. ? The ? data ? traces ? are ? not ? necessarily ? connected ? to ? the ?
DDR3 ? chips ? in ? sequential ? order, ? but ? for ? ease ? of ? routing, ? are ? connected ? as ? best ? determined ? by ? the ? layout ?
and ? other ? critical ? traces. ? The ? i.MX53 ? Processor ? has ? the ? capability ? of ? remapping ? SDRAM ? word ? bit ? order ?
based ? on ? chip ? select ? used, ? so ? that ? words ? can ? be ? physically ? stored ? in ? memory ? in ? correct ? order. ? If ? this ? is ? a ?
feature ? the ? developer ? wishes ? to ? implement, ? there ? is ? more ? information ? in ? the ? software ? reference ?
manual. ?
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The ? DDR_VREF ? is ? created ? by ? a ? simple ? voltage ? divider ? using ? 470 ? Ohm ? 1% ? resistors ? and ? 0.1 ? uF ? capacitors ?
for ? stability. ? The ? relatively ? small ? value ? resistors ? provide ? enough ? current ? to ? maintain ? a ? steady ? mid ‐ point ?
voltage. ? The ? calibration ? resistors ? used ? by ? the ? four ? DDR3 ? chips ? and ? the ? Processor ? are ? 240 ? Ohm ? 1% ?
resistors. ? This ? resistor ? value ? is ? specified ? by ? the ? DDR3 ? Specifications. ? There ? is ? a ? 200 ? Ohm ? resistor ? between ?
each ? clock ? differential ? pair ? to ? maintain ? the ? correct ? impedance ? between ? the ? two ? traces. ? The ? DDR3 ?
SDRAM ? should ? be ? rated ? for ? 1066 ? MHz ? or ? faster. ?
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For ? skilled ? designers ? wishing ? to ? double ? the ? amount ? of ? DDR3 ? SDRAM ? available ? for ? use ? with ? the ? i.MX53 ?
processor ? using ? eight ? x8 ? width ? DDR3 ? chips, ? the ? following ? considerations ? should ? be ? weighed ? carefully ?
before ? proceeding: ? Four ? DDR3 ? chips ? on ? a ? chip ? select ? line ? will ? exceed ? the ? current ? supply ? capability ? of ? the ?
VBUCKMEM ? power ? source. ? An ? additional ? 1.5V ? power ? source ? would ? need ? to ? be ? added. ? Also, ? attaching ?
the ? address ? lines ? to ? eight ? DDR3 ? chips ? is ? a ? great ? amount ? of ? loading. ? Premium ? PCB ? materials ? would ? be ?
required ? to ? reduce ? losses. ? Freescale ? has ? tested ? and ? validated ? using ? eight ? DDR2 ? SDRAM ? chips ? in ? this ?
manner. ? Using ? eight ? DDR3 ? SDRAM ? chips ? has ? not ? yet ? been ? tried. ?
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Freescale Semiconductor
Hardware User Guide for i.MX53 Quick Start Board,
Preliminary Rev 0.91
51
PUBI – Public Use Business Information ?
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